l
My patch has been passed the stress test for both PPC and Intel
architechture against OFED-1.3-RC2 bit for a couple days. And I didn't =
see
performance imapct for 2K mtu. But I rethink about your suggestion here=
yesterday night. I can modify my patch to meet your thoughts here by
keeping current implementation of 2K mtu and using if condition check f=
or
the new code. I will submit a new version of patchset today for review.=
Since I only have two days for my patch to be integred into OFED-1.3-RC=
3
for Distros to pick up. I would like to see your ack here for this appr=
oach
as soon as possible. I will compare two different implementation's
performance.
Thanks for your inputs. Appreciate your prompt response.
Thanks
Shirley=
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<p><tt>Hello Roland,</tt><br>
<br>
<tt>> So how about the following? When using a UD MTU of 4096 =
with a page<br>
> size of 4096, allocate an skb of size 44 for the GRH and ethertype=
,<br>
> and then allocate a single page for the fragment list. This =
means<br>
> that the IP packet will start nicely 16-byte aligned for free, and=
all<br>
> the bookkeeping is very simple.<br>
</tt><br>
<tt>My patch has been passed the stress test for both PPC and Intel arc=
hitechture against OFED-1.3-RC2 bit for a couple days. And I didn't see=
performance imapct for 2K mtu. But I rethink about your suggestion her=
e yesterday night. I can modify my patch to meet your thoughts here by =
keeping current implementation of 2K mtu and using if condition check f=
or the new code. I will submit a new version of patchset today for revi=
ew. Since I only have two days for my patch to be integred into OFED-1.=
3-RC3 for Distros to pick up. I would like to see your ack here for thi=
s approach as soon as possible. I will compare two different implementa=
tion's performance.</tt><br>
<br>
<tt>Thanks for your inputs. Appreciate your prompt response.</tt><br>
<br>
<tt>Thanks</tt><br>
<tt>Shirley</tt></body></html>=
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