From: Jack Steiner <steiner@sgi.com>
Add failsafe mechanism to HPET/TSC clock calibration.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Updated to include failsafe mechanism & additional community feedback.
Patch built on latest 2.6.20-rc4-mm1 tree.
Signed-off-by: Andi Kleen <ak@suse.de>
---
arch/x86_64/kernel/time.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
Index: linux/arch/x86_64/kernel/time.c
===================================================================
--- linux.orig/arch/x86_64/kernel/time.c
+++ linux/arch/x86_64/kernel/time.c
@@ -657,6 +657,7 @@ core_initcall(cpufreq_tsc);
#define TICK_COUNT 100000000
#define TICK_MIN 5000
+#define MAX_READ_RETRIES 5
/*
* Some platforms take periodic SMI interrupts with 5ms duration. Make sure none
@@ -664,13 +665,17 @@ core_initcall(cpufreq_tsc);
*/
static void __init read_hpet_tsc(int *hpet, int *tsc)
{
- int tsc1, tsc2, hpet1;
+ int tsc1, tsc2, hpet1, retries = 0;
+ static int msg;
do {
tsc1 = get_cycles_sync();
hpet1 = hpet_readl(HPET_COUNTER);
tsc2 = get_cycles_sync();
- } while (tsc2 - tsc1 > TICK_MIN);
+ } while (tsc2 - tsc1 > TICK_MIN && retries++ < MAX_READ_RETRIES);
+ if (retries >= MAX_READ_RETRIES && !msg++)
+ printk(KERN_WARNING
+ "hpet.c: exceeded max retries to read HPET & TSC\n");
*hpet = hpet1;
*tsc = tsc2;
}
-
